Part of Advances in Neural Information Processing Systems 14 (NIPS 2001)
A. Bofill, D. Thompson, Alan Murray
Experimental data has shown that synaptic strength modification in some types of biological neurons depends upon precise spike tim(cid:173) ing differences between presynaptic and postsynaptic spikes. Sev(cid:173) eral temporally-asymmetric Hebbian learning rules motivated by this data have been proposed. We argue that such learning rules are suitable to analog VLSI implementation. We describe an eas(cid:173) ily tunable circuit to modify the weight of a silicon spiking neuron according to those learning rules. Test results from the fabrication of the circuit using a O.6J.lm CMOS process are given.