Richard Coggins, Marwan Jabri, Barry Flower, Stephen Pickard
An analogue VLSI neural network has been designed and tested to perform cardiac morphology classification tasks. Analogue tech(cid:173) niques were chosen to meet the strict power and area requirements of an Implantable Cardioverter Defibrillator (ICD) system. The ro(cid:173) bustness of the neural network architecture reduces the impact of noise, drift and offsets inherent in analogue approaches. The net(cid:173) work is a 10:6:3 multi-layer percept ron with on chip digital weight storage, a bucket brigade input to feed the Intracardiac Electro(cid:173) gram (ICEG) to the network and has a winner take all circuit at the output. The network was trained in loop and included a commercial ICD in the signal processing path. The system has suc(cid:173) cessfully distinguished arrhythmia for different patients with better than 90% true positive and true negative detections for dangerous rhythms which cannot be detected by present ICDs. The chip was implemented in 1.2um CMOS and consumes less than 200n W max(cid:173) imum average power in an area of 2.2 x 2.2mm2.