R. Vogelstein, Francesco Tenore, Ralf Philipp, Miriam Adlerstein, David Goldberg, Gert Cauwenberghs
Address-event representation (AER), originally proposed as a means to communicate sparse neural events between neuromorphic chips, has proven efﬁcient in implementing large-scale networks with arbitrary, conﬁgurable synaptic connectivity. In this work, we further extend the functionality of AER to implement arbitrary, conﬁgurable synaptic plas- ticity in the address domain. As proof of concept, we implement a bi- ologically inspired form of spike timing-dependent plasticity (STDP) based on relative timing of events in an AER framework. Experimen- tal results from an analog VLSI integrate-and-ﬁre network demonstrate address domain learning in a task that requires neurons to group corre- lated inputs.